STMicroelectronics STM32 CPU Support Package

Warning: This is a legacy package, it has been provided to keep existing projects working and is not recommended for new projects. This package has been replaced by STMicroelectronics STM32 CPU Support Package.

This package contains project templates and system files for the STMicroelectronics STM32.

CrossWorks Version 2 Installation Instructions

To install this support package
  1. Click the Tools > Package Manager menu option to open the package manager window.
  2. Right click on the STMicroelectronics STM32 CPU Support Package entry and select Install Selected Packages.
  3. Click Next to take you to the summary page.
  4. Click Next to install the package.
  5. Click Finish to close the package manager window.
  6. Click the Tools > Show Installed Packages.
  7. Click on the STMicroelectronics STM32 CPU Support Package link to view the package and its contents.
To manually install this support package
  1. If you have not done so already, follow the CMSIS 3 Support Package installation instructions.
  2. Download the file STM32.hzq using your web browser.
  3. Click the Tools > Manually Install Packages menu option.
  4. Select the file you have just downloaded to install the package.
  5. Click the Tools > Show Installed Packages.
  6. Click on the STMicroelectronics STM32 CPU Support Package link to view the package and its contents.
To install this support package using other versions

Release Notes































Creating STM32 Projects

To create a new STM32 project
To build and debug an application the runs in Flash memory
To make the application startup from reset

STM32 Project Specifics

Target Processor

Once a project has been created you can select different target processors by right clicking on the project node in the project explorer and selecting the Target Processor entry.

Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting View Memory Map or View Memory Map (as text).

Selecting the target processor will cause the following preprocessor definitions to be defined when you build the project:

For devices that have an FPU the preprocessor definition __FPU_PRESENT is defined.

Section Placement

CrossStudio for ARM supports STM32 projects running applications in a number of different memory configurations. You can select the memory configuration you require by right clicking on the project node in the project explorer and selecting the Placement entry.

For STM32 projects the set of placements are:

Stack and Heap Sizes

The stack and heap sizes are set to be 128 bytes by default when a project is created. This enables projects to run on the smallest of the STM32 processors. It is likely that you will need to change these values when developing applications to run on the larger of the STM32 processors.

Target Startup Code

The startup code STM32_Startup.s is common to all STM32F and STM32L processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to a weak symbol SystemInit with the stack pointer set to the top of RAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code as such it cannot access initialised static data.

The startup code declares symoblic names (and weak implementations) for each interrupt service routine, for example the EXTI0_IRQHandler function will be called when this interrupt occurs. If you are porting code that has application specific interrupt service routine names then you can use the preprocessor definitions to rename the symbol for example EXTI0_IRQHandler=MyEXTI0ISR.

Target Reset Script

The reset script STM32_Target.js is used by the debugger to reset the target board.

The reset script will program the DBGMCU register so that the STM32 watchdog timers are stopped when in debug mode and the STM32 lower-power mode debugging is enabled.

The reset script provides some support for programming the USER option byte of the STM32F10x, STM32L and STM32F2xx/STM32F4xx. To use these you should:

For STM32F10x targets:

For STM32L targets:

For STM32F2xx/STM32F4xx targets:

You should then disconnect the target interface and power cycle the board.

STM32 Internal Flash Loader

The source code to the flash loaders for the internal Flash of the various devices is provided.


The STM32L memory map files and flash loader supports loading the EEPROM which can be used as follows:

      extern unsigned eevar  __attribute__ ((section(".eeprom")));
      unsigned eevar = 12;
Memory Simulator

An STM32 memory simulator is provided that simulates the memories of the various STM32 devices. The memory simulation parameter (which is set by the Target Processor selection) specifies the device name, the size of the internal Flash and RAM memories and then optionally the sizes of 4 FSMC Flash/RAM memories.

CMSIS support

CMSIS header files and source are included as part of the new project setup.

CTL support

The file STM32_ctl.c implements the CTL system timer using the Cortex-M SysTick timer. The timer is configured to interrupt at a 10 millisecond rate and increment the CTL system timer by 10 to give a millisecond timer. The implementation uses the CMSIS SystemFrequency global variable to determine the CPU clock frequency. The CTL samples that are provided in this package have board specific files that implement this variable.

The CTL interrupt support functions ctl_global_interrupts_set, ctl_set_priority, ctl_unmask_isr and ctl_mask_isr are implemented in this file. The Cortex-M3 and Cortex-M4 implementations uses the lowest half of the available NVIC priorities (top bit set in the priority) for CTL interrupts and disables global interrupts by raising t he NVIC basepriority above the highest CTL priority. This enables you to use the upper half of the NVIC priorities for interrupts that do not use CTL and should not be disabled by a CTL interrupt. The functions ctl_lowest_isr_priority, ctl_highest_isr_priority, and ctl_adjust_isr_priority are provided to assist with setting isr priorities.

Known problems

The "Connect With Reset" project property doesn't work with the original ST-LINK and also causes the part name detection to fail on Cortex-M0 devices.